Modeling of RC Snubber, Ferrite Bead and Gate Drive Impedance for Optimal EMI Suppression and Switching Loss Trade-Off in SiC MOSFET Power Converters

The relentless drive towards extremely fast switching frequency, elevated operating voltage, increased thermal capabilities, and reduced switching losses have positioned Silicon Carbide (SiC) MOSFETs based converters at the forefront in high-performance power electronics applications. This brings in the benefits of enhanced switching frequencies, improved power density, and enhanced dynamic response. Unfortunately, this is critically constrained by severe Electromagnetic Interference (EMI), high-frequency ringing and undesirable switching oscillations. These challenges are addressed through a systemic modelling and analysis mitigation measures, the holistic co-optimizing ferrite bead on the gate loop, RC snubber, and gate drive impedance simultaneously. An LTspice simulation framework was developed, incorporating the manufacturer’s spice models to accurately model parasitics and quantify losses. The proposed methodology shows that the addition of the mitigation technique offers a practical trade-off between EMI suppression and switching performance, without increasing the switching losses.